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Entegris Scientists Find Ways to Benefit Both Yield and Costs for Chip Makers

The problem of electrostatic discharge (ESD) resulting from charges on wafers is a serious concern in IC manufacturing. Controlled Environments magazine recently published an article authored by Entegris scientists showing a new technique to reduce or eliminate static discharge on work-in-progress wafers.

 

Entegris scientists showed that by adding an ionization module to the purge gas supply line, fabs can fill the microenvironment in a wafer carrier with ionized gas to neutralize charges on wafers.

 

 

 

What's going on in 450 mm?

This seems to be one of the most popular questions in our industry these days. Here at Entegris, we've been working with the SEMI® standards committee and top chipmakers to make this new technology a reality. This week, SEMI standards will most likely be adopted during SEMICON® West. After these standards are adopted, it's just a matter of finalizing designs and securing capital investments.

 

 

Entegris has representatives co-chairing some of the SEMI standards committees, and are seeking to develop a methodology for shipping and transporting such large wafers to cut die costs in half. One of the biggest challenges is the sheer size of the wafer. Not only are the wafers larger and heavier, they require larger carriers as well. These sizes increase the cost of shipping and may mandate the use of automation—design challenges we are committed to solve. See our single and multiple 450 mm wafer carriers.